Saurabh Singh

I am a 3rd year Ph.D. student at the School of Computer Science at Georgia Tech. At Tech, I am part of the HPArch Lab advised by Prof. Hyesoon Kim.

Previously, I was working as a full-time ASIC design engineer at SiFive. I have completed my undergrad (B. Tech) in Electronics and Communication Engineering (ECE) at the Indian Institute of Information Technology Guwahati (IIITG), India.

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Research Interests

Computer Architecture Hardware Security GPU Security and Reliability

I am broadly interested in the domain of Computer Architecture and Hardware Security. Recently I’ve been focussing on GPU Security and Memory Safety in GPUs.

My past research lies broadly in the domain of Computer Architecture, Systems, and Digital VLSI design. During my undergrad, I worked on the design, implementation, and evaluation of approximate arithmetic circuits such as Adders, Multipliers, and Multiply and Accumulate (MAC) units. These were designed to achieve better area, power, and timing parameters than their accurate counterparts, while at the same time, maintaining a respectable quality of results on fault-tolerant applications like image processing and machine learning.

I am also a RISC-V enthusiast. My bachelor’s thesis was “CLAP: Cross-Layer Approximate Computing on Custom RISC-V Processors” as a part of which I modified the Atom processor to incorporate a tightly integrated approximate computing unit. The system was capable of executing approximate computing instructions natively using a non-standard extension to the RISC-V ISA. I also worked on adding support for a C & assembly library called AxKit.

My undergraduate research has been supervised by Prof. Dip Sankar Banerjee and Prof. Babita Jajodia.